SSCS Toronto is pleased to host two incredible speakers for a double feature distinguished lecture. The first speaker who will present from 3:00pm to 4:00pm is Dr. Rabia Yazicigil. Her talk is: Title: The Circuit Frontier: Innovating and Expanding ASIC Solutions for Enhanced Biosensing and Seamless Wireless Communication Abstract: This talk will introduce Cyber-Secure Biological Systems, leveraging living sensors constructed from engineered biological entities seamlessly integrated with solid-state circuits. This unique synergy harnesses the advantages of biology while incorporating the reliability and communication infrastructure of electronics, offering a unique solution to societal challenges in healthcare and environmental monitoring. In this talk, examples of Cyber-Secure Biological Systems, such as miniaturized ingestible bioelectronic capsules for gastrointestinal tract monitoring and hybrid microfluidic-bioelectronic systems for environmental monitoring, will be presented. Additionally, I will introduce a universal noise-centric data decoding approach using GRAND that facilitates ultra-low-energy wireless communications, a critical requirement for the success of these biological systems and numerous other applications. In this talk, I will delve into the intricacies of interdisciplinary approach for system design, spotlighting the potential of energy-efficient integrated circuits in the domains of biosensing and wireless communications. These collaborative research projects involve MIT BE/MechE, BU ECE/BME, and MIT RLE-Northeastern University. The second speaker who will present from 4:00pm to 5:00pm is Dr. Alvin Loke. His talk is: Title: The Road to Gate-All-Around CMOS Abstract: Despite the much debated end of Moore's Law, CMOS scaling still maintains economic relevance with 3nm finFET SoCs already in the marketplace for over a year and 2nm gate-all-around SoCs well into risk production. Modest feature size reduction and design/technology innovations co-optimized for primarily logic scaling continue to offer compelling node-to-node power, performance, area, and cost benefits. In this tutorial, we will start with a walk through memory lane, recounting a brief history of transistor evolution to motivate the migration from the planar MOSFET to the fully depleted FinFET. We will summarize the key process technology elements that have enabled the finFET CMOS nodes, highlighting the resulting device technology characteristics and challenges. This will set the context for motivating the introduction of the gate-all-around device architecture, namely nanoribbons or nanosheets, and unveiling the magic of how these devices are fabricated. Speaker(s): Rabia, Alvin Room: SF2202, Bldg: Sandford Fleming Building, 10 King's College Rd, Toronto, Ontario, Canada, M5S 3G4
