Thursday Nov 15, 2018 at 1:30 p.m. Dr. Daniel Friedman, Distinguished Research Staff Member, IBM T.J. Watson Research Center, will be presenting “SSCS Distinguished Lecture: Considerations and Implementations For High Data Rate Interconnect”.
Day & Time: Thursday November 15th, 2018
1:30 p.m. ‐ 2:30 p.m.
Speaker: Dr. Daniel Friedman
Distinguished Research Staff Member
IBM T.J. Watson Research Center
Organizers: IEEE Toronto Solid-State Circuits Society
Location: Bahen Centre Room B024
40 St. George Street
Toronto, ON M5S 2E4
Contact: Dustin Dunwell
Abstract: Cloud computing requires many different interconnects. These links provide connectivity between and among CPUs, accelerators, memory, and switches; each link comes with its own distance and bandwidth requirements. Wireline transceivers are responsible for sending and receiving data from one chip to and from another, thus enabling required connectivity. Key specifications for such designs include data rate, power consumption, area, and connection distance. Distance and data rate specifications, in particular, drive the choice of physical channel to be used for the connection, which in turn drives requirements including the equalization capabilities of the transceiver. For short chip-to-chip channels with limited frequency-dependent loss, simple transceivers with little or no integrated equalization are appropriate, while for longer channels crossing backplanes and involving multiple transitions through connectors, complex transceivers with adaptive transmit and receive equalization are the right choice. As connection distances grow even longer, optical interconnect becomes an attractive option. In this talk, a framework for understanding serial link design will be presented, including a discussion of basic equalization strategies and key challenges. Next, several design examples will be presented, covering approaches to key classes of interconnect, from short reach channels to backplane channels to enabling highly integrated optical approaches. The talk will conclude with a discussion of emerging directions in this field.
Biography: Daniel Friedman is currently a Distinguished Research Staff Member and Senior Manager of the Communication Circuits and Systems department of the IBM Thomas J. Watson Research Center. He received his doctorate from Harvard University in 1992 and subsequently completed post-doctoral work at Harvard and consulting work at MIT Lincoln labs, broadly in the area of image sensor design. After joining IBM in 1994, he initially developed field-powered RFID tags before turning to high data rate wireline and wireless communication. His current research interests include high-speed I/O design, PLL design, mmWave circuits and systems, and circuit/system approaches to enabling new computing paradigms. He was a co-recipient of the Beatrice Winner Award for Editorial Excellence at the 2009 ISSCC, the 2009 JSSC Best Paper Award (given in 2011), and the 2017 ISSCC Lewis Winner Outstanding Paper Award; he holds more than 50 patents and has authored or co-authored more than 75 publications. He was a member of the BCTM technical program committee from 2003-2008 and of the ISSCC international technical program committee from ISSCC 2009 through ISSCC 2016; he served as the Wireline sub-committee chair from ISSCC 2012 through ISSCC 2016. He has served as the Short Course Chair from ISSCC 2017 to the present and is a member of the SSCS Adcom since 2018.