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Linearization Techniques for Push-Pull Amplifiers

Thursday, January 28, 2016 @ 11:00 AM - 12:00 PM

Thursday January 28, 2016 at 11:10 a.m. Dr. Rinaldo Castello, IEEE Fellow, will be presenting “Linearization Techniques for Push-Pull Amplifiers”.

Speaker: Dr. Rinaldo Castello
IEEE Fellow
University of Pavia, Italy

Day & Time: Thursday, January 28, 2016
11:10 a.m.

Location: University of Toronto, Bahen Centre, Room BA1230

Organizer: Solid-State Circuits Society

Contact: Dustin Dunwell

Abstract: Amplifiers that need to drive heavy loads (low resistances and/or large capacitances) or to handle high current signals with good efficiency generally use a push-pull output stage. This intrinsically creates large open-loop distortion components that need to be compressed through feedback to insure high closed-loop linearity. Minimizing close loop residual distortion involves three steps that will be discussed. First, eliminate all open-loop source of distortion not intrinsic to the proper operation of the push pull structure. Second, choose the amplifier topology that gives the maximum close loop compression of the open-loop distortion components for a given bandwidth. Third, maximize the open-loop gain in the signal band and/or the unity gain bandwidth of the amplifier for a given topology while insuring stability in the presence of variable loads.

Biography: Rinaldo Castello (S’78–M’78–SM’92–F’99) graduated from the University of Genova (summa cum laude) in 1977 and received the M.S. and the Ph. D. from the University of California, Berkeley, in ‘81 and ‘84. From ‘83 to ‘85 he was Visiting Assistant Professor at the University of California, Berkeley. In 1987 he joined the University of Pavia where he is now a Full Professor. He consulted for ST-Microelectronics, Milan, Italy up to 2005 in ‘98 he started a joint research centre between the University of Pavia and ST and was its Scientific Director up to ‘05. He promoted the establishing of several design centre from multinational IC companies in the Pavia area among them Marvell for which he has been consulting from 2005. Rinaldo Castello has been a member of the TPC of the European Solid State Circuit Conference (ESSCIRC) since 1987 and of the International Solid State Circuit Conference (ISSCC) from ‘92 to ‘04. He was Technical Chairman of ESSCIRC ’91 and General Chairman of ESSCIRC ‘02, Associate Editor for Europe of the IEEE J. of Solid-State Circ. from ’94 to ’96 and Guest Editor of the July ’92 special issue. From 2000 to 2007 he has been Distinguished Lecturer of the IEEE Solid State Circuit Society. Prof Castello was named one of the outstanding contributors for the first 50 and 60 years of ISSCC and a co-recipient of the Best Student Paper Award at the 2005 Symposium on VLSI of the Best Invited Paper Award at the 2011 CICC and of the Best Evening Panel Award at ISSCC 2012. He was one of the two European representatives at the Plenary Distinguished Panel of ISSCC 2013 and the Summer 2014 Issue of the IEEE Solid State Circuit Magazine was devoted to him. Rinaldo Castello is a Fellow of the IEEE.


Thursday, January 28, 2016
11:00 AM - 12:00 PM
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