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SUMMARY:THE ROLE OF CO-PACKAGED OPTICS IN OUR CONNECTED FUTURE
DESCRIPTION:Progress in computation and communication is increasingly bottlenecked by integrated circuit I/0. CMOS technology scaling has enabled the integration of hundreds of complete modems operating over 100Gbps on a single chip. Whereas optical links were previously reserved for communication over 100’s of kilometres\, they are now the primary solution for chip-to-chip links above 100 Gbps over any distance beyond a few metres. Co-packaged optics (CPO) bring optics right to the perimeter of our electronic integrated circuits\, and may therefore appear to be a natural continuation of this trend.\nIndeed\, PO holds the promise of simultaneously lowering system power consumption\, decreasing I/0 latency\, and increasing the total bandwidth of chip I/O. And yet\, at the same time\, it has the potential to increase the power density\, increase the cost\, and limit the bandwidth density of our\nchio I/O. This talk will clarify these seeming contradictions\, and paint a realistic picture of CPO’s role in future connectivity.\nCo-sponsored by: SPIE OPTICA Student Chapter\nSpeaker(s): Dr. Tony Chan Carusone\,\nRoom: GB119\, Bldg: Galbraith Building\, University of Toronto\, Toronto\, Ontario\, Canada
URL:https://www.ieeetoronto.ca/event/the-role-of-co-packaged-optics-in-our-connected-future/
LOCATION:Room: GB119\, Bldg: Galbraith Building\, University of Toronto\, Toronto\, Ontario\, Canada
CATEGORIES:Solid-State Circuits
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