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DTSTART;TZID=UTC:20260518T100000
DTEND;TZID=UTC:20260518T110000
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SUMMARY:Virtual Seminar – Heterogeneous Integration and Advanced Packaging for AI and the Chiplet ERA
DESCRIPTION:While silicon scaling has reached astonishing levels over the last half century\, there has not been a corresponding level of scaling in electronic packaging technology. However\, Artificial Intelligence (AI) architectures are now changing the landscape\, increasingly moving us towards chiplets and advanced packaging technology\, especially Heterogeneous Integration (HI). What are these unique requirements of AI which are driving the need for HI? What are some of the unique challenges in semiconductor and packaging technologies that must be overcome to make this successful? This seminar will discuss key HI methods including interposers\, fan out wafer level processing\, silicon bridges\, and 3D integration. We will look at their attributes as well as their challenges\, to determine how they can be leveraged to achieve AI architectures. \nSpeaker:  Dr. Mukta Farooq\, IBM Distinguished Research Scientist\, IEEE Fellow \n 
URL:https://www.ieeetoronto.ca/event/heterogeneous-integration-and-advanced-packaging-for-ai-and-the-chiplet-era/
LOCATION:https://events.vtools.ieee.org/m/554791
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